The switching principle

Intent

• Explain why an ideal switching converter dissipates no power, unlike a linear regulator.
• Compute the dc component of a switch-node waveform from the duty ratio $D$.
• State what the output filter must do and what the small-ripple approximation assumes.

Theory

Why switch?

A linear regulator lowers a voltage by dropping the difference across a transistor that carries the whole load current; that difference times the load current is lost as heat. An ideal switch loses nothing: when it is on, the voltage across it is zero, and when it is off, the current through it is zero, so the product of the two, the power it dissipates, is zero in both states [Erickson & Maksimović 2020, Ch. 1 (Introduction)]. Ideal inductors and capacitors store and return energy without dissipating any. A converter built only from ideal switches and reactive elements can therefore convert power without loss.

The switch node and its dc component

Connect a single-pole double-throw switch to the input source. In position 1 the switch node sees the input voltage $V_g$; in position 2 it is grounded. The switch repeats this pattern once every switching period

$$T_s = \frac{1}{f_s}$$

$T_s$

switching period

$f_s$

switching frequency

Switching period✓ verified by 7 tests

Assumptions, convention and source

Assumptions

• definition

Source

Erickson & Maksimović 2020, Ch. 2 (Principles of Steady-State Converter Analysis)

Equation id

def.Ts · equations.yaml entry

and spends the fraction $D$ of each period, the duty ratio, in position 1 [Erickson & Maksimović 2020, Ch. 2]. The switch-node voltage $v_s(t)$ is therefore a rectangular wave. Its average over one period, its dc component, is

$$\langle v_s \rangle = D V_g$$

$\langle v_s \rangle$

average switch-node voltage

$D$

duty ratio

$V_g$

input voltage

DC component of the switch-node voltage (buck)✓ verified by 7 tests

Assumptions, convention and source

Assumptions

• ideal (lossless) switches and passive components
• periodic steady state

Notes

the switch node sits at $V_g$ for $D T_s$ and at $0$ for the rest of the period; the LC filter passes this average

Source

Erickson & Maksimović 2020, Ch. 2 (Principles of Steady-State Converter Analysis)

Derivation

step-by-step sympy derivation

Equation id

sw.v_avg · equations.yaml entry

The buck's switch-node voltage $v_s(t)$: $V_g$ for $DT_s$, zero for the rest of each period. Its average is $DV_g$, which the $L$-$C$ filter passes to the output. [Erickson & Maksimović 2020, Ch. 2]

Filtering: keep the average, reject the harmonics

A Fourier series splits $v_s(t)$ into that dc component plus harmonics at multiples of the switching frequency $f_s$. An L-C low-pass filter whose corner frequency lies well below $f_s$ passes the dc component and strongly attenuates the harmonics, so the output voltage is essentially the dc component of the switch node [Erickson & Maksimović 2020, Ch. 2]. The duty ratio, a timing quantity, now sets a dc voltage.

The conversion ratio

A converter is summarised by its conversion ratio $M(D)$, the dc output voltage divided by the dc input voltage:

$$V = M V_g$$

$V$

output voltage

$M$

conversion ratio

$V_g$

input voltage

Output voltage from the conversion ratio✓ verified by 7 tests

Assumptions, convention and source

Assumptions

• definition

Source

Erickson & Maksimović 2020, Ch. 2 (Principles of Steady-State Converter Analysis)

Equation id

def.V · equations.yaml entry

Filtering the switch node is the buck converter: its output is the switch-node average, which gives the buck conversion ratio. Other arrangements of the same switch, inductor and capacitor give other ratios, such as those of the boost and the buck-boost. All three are derived on the volt-second balance page.

The small-ripple approximation

A real filter leaves some switching ripple on the output. With a well-designed filter the ripple is small compared with the dc value, and in steady-state analysis the output voltage may be replaced by its dc value $V$: the small-ripple approximation [Erickson & Maksimović 2020, Ch. 2]. With it, the voltage across the inductor is constant within each subinterval, so the inductor current rises and falls along straight lines; the slope of those lines sets the current ripple. Apply the approximation to quantities that are nearly constant, never to the ripple you are trying to compute.

Worked example

An example buck converter, whose switch node is filtered by an L-C stage into a resistive load:

Buck example

Symbol	Value	How it is obtained
$V_g$ input voltage	24 V	given
$D$ duty ratio	0.5	given
$f_s$ switching frequency	100 kHz	given
$T_s$ switching period	10 µs	Switching period
$\langle v_s \rangle$ average switch-node voltage	12 V	DC component of the switch-node voltage (buck)
$M$ conversion ratio	0.5	Buck conversion ratio, CCM
$V$ output voltage	12 V	Output voltage from the conversion ratio
$\Delta i_L$ inductor ripple, half peak-to-peak	300 mA	Buck inductor current ripple (half peak-to-peak), CCM

The switch node spends the fraction 0.5 of each 10 µs period at 24 V, so its dc component, and with it the output, is 12 V. The inductor current still carries a triangular ripple of 300 mA around its dc value (half of peak-to-peak), which the output capacitor smooths further.

Try it

▶ Open in the equation explorer: DC component of the switch-node voltage (buck)
Preset from the example buck-basic

▶ Open in the simulator: Buck
Preset from the example buck-basic

Sweep $D$ from 0 to 1: the dc component grows in proportion to it, whatever the switching frequency.

Bench exercise

No power stage is needed. Feed a logic-level square wave from a function generator into an R-C low-pass filter whose corner frequency is far below the square wave’s frequency. Measure the filter output with a multimeter on its dc range while you change the duty cycle, and compare each reading with the high level of the square wave times the duty ratio. Then look at the same node with an oscilloscope: the remaining ripple shrinks when you raise the frequency or the filter’s time constant, while the dc reading does not change.

Gotchas

• The average follows the switch node, not the gate signal. Diode forward drops, switch resistance and dead time change the switch-node voltage during parts of the period, so the dc output departs from the ideal value set by the commanded duty ratio. The averaged-models page adds such losses to the model [Erickson & Maksimović 2020, Ch. 3].
• In DCM the switch node does not return to zero for the whole off-interval. Once the inductor current has fallen to zero, the diode stops conducting and the switch node rings around the output voltage, so the output ends up above $D V_g$; see CCM and DCM [Erickson & Maksimović 2020, Ch. 5].

Go deeper

• Book chapter Principles of Steady-State Converter Analysis (Ch. 2) — R. W. Erickson, D. Maksimović · retrieved 2026-09-23
  The standard derivation of volt-second and charge balance, the small-ripple approximation and inductor/capacitor ripple.
• Course Introduction to Power Electronics — University of Colorado Boulder (Coursera) · retrieved 2026-09-23
  First course of the CU Boulder specialization: steady-state analysis, losses and efficiency.
• Application note Basic Calculation of a Buck Converter's Power Stage (SLVA477) — B. Hauke, Texas Instruments · retrieved 2026-09-23
  A compact CCM design-calculation checklist: duty ratio, inductor ripple, capacitors.

Quiz

1. An ideal switch is either fully on or fully off. How much power does it dissipate?

   1. Zero only while it is off
   2. The input voltage times the load current while it is on
   3. Zero in both states, because either its voltage or its current is zero
   4. It depends on the duty ratio
   Answer and explanation

   Correct answer: C Power is voltage times current. An ideal switch that is on has no voltage across it, and one that is off carries no current, so the product is zero in both states.

2. A switch node alternates between $12\,\mathrm{V}$ and $0\,\mathrm{V}$ with $D = 0.25$. What is its dc component?

   1. $3\,\mathrm{V}$
   2. $6\,\mathrm{V}$
   3. $9\,\mathrm{V}$
   4. $12\,\mathrm{V}$
   Answer and explanation

   Correct answer: A The dc component is the average over one period: the high level times the fraction of the period spent there, a quarter of $12\,\mathrm{V}$.

3. Why must the corner frequency of the output L-C filter lie well below the switching frequency?

   1. So that the inductor current never reaches zero
   2. So that the filter passes the dc component and attenuates the switching harmonics
   3. To make the duty ratio independent of the load
   4. To reduce the conduction loss of the switch
   Answer and explanation

   Correct answer: B The switch-node waveform is a dc component plus harmonics at multiples of $f_s$. A low-pass filter whose corner lies well below $f_s$ keeps the dc component and strongly attenuates the harmonics.

4. What does the small-ripple approximation assume?

   1. The inductor current ripple is zero
   2. The duty ratio is small
   3. The switching frequency is lower than the filter corner frequency
   4. The switching ripple on a nearly constant quantity, such as the output voltage, is small enough to replace that quantity by its dc value
   Answer and explanation

   Correct answer: D It replaces a waveform that has little ripple by its dc value while other quantities are computed, for example the voltage across the inductor. It is never applied to the ripple being computed: the inductor current ripple follows from the slopes that the approximation makes constant.

5. A buck converter in CCM runs at a fixed duty ratio. The switching frequency is doubled. What happens to the dc output voltage?

   1. It doubles
   2. It halves
   3. It stays the same
   4. It drops to zero
   Answer and explanation

   Correct answer: C In CCM the dc output equals the dc component of the switch node, $D V_g$, which does not depend on $f_s$. Doubling $f_s$ halves the period and the current ripple, not the average.

6. Why does a linear regulator waste power when its input voltage is much higher than its output voltage?

   1. It switches too slowly
   2. Its pass transistor carries the whole load current while dropping the input-output difference
   3. Its output capacitor has series resistance
   4. Its duty ratio is limited
   Answer and explanation

   Correct answer: B The pass transistor is in series with the load, so it carries the load current and drops the voltage difference; the product of the two is dissipated as heat.